2010年12月31日 星期五

微機電封裝製程模擬 (MEMS Packaging Simulation)

Packaging of MEMS device is the most important issue on either manufacturing cost or reliable operation due to the movable component such as suspension membrane, comb structures, cantilever and spring-like support, etc. In order to improve the life time in operation, the MEMS chip usually needs to be mounted on a metal substrate by molding epoxy resins before encapsulation. However, the molding process is quite different with traditional semiconductor IC packaging owing to the free space for movable component is necessary. Hence, the molding epoxy only can cover a part of space of chip instead of a full fill in the IC packaging. In addition, the coefficient of thermal expansion (CTE) mismatches between silicon chip and epoxies could induce the thermal stress and distortion within diaphragm during the temperature cycle as packaging [1, 2]. The induced stresses results in changing the designed sensitivity and response range, therefore, we investigate two typical methods, die attach and flip chip bond, used in most MEMS packaging for evaluating the effects of molding epoxy on thermal stress within membrane area. For protecting the membrane area, the molding epoxy can be injected to the MEMS die surroundings with a gap or covered to the MEMS die but beyond the membrane area by quantity control and a protection cover, respectively. As the molding epoxy covered to the MEMS die certainly provides better adhesion and sustains more environmental requirements, therefore, we utilized finite element analysis(FEA) software ABAQUS to evaluate which package method is more suitable for MEMS device with diaphragm.
2D Simulation model of package
Four kinds of two-dimensional model for die attach and flip chip bond with different molding processes were illustrated in the Fig. 1. Type I and II are indicated without and with the molding epoxy covered onto the silicon substrate, respectively. The MEMS chip consists of 650×650 μm2 polysilicon membrane released by the anisotropic KOH wet etch from backside and the thickness is 2 μm. The size of MEMS chip is 1.6×1.6? mm2 shown in the Fig. 2. In the die attach method, the MEMS chip was glued on a copper plate with adhesive and the electrical interconnection was used wire bonding process. On the other hand, the MEMS chip was bonded and mounted onto the copper substrate by solder ball in the case of flip chip bond. All the parameters used in the FEA were listed in the Table 1. The curing process of molding epoxy needs total 260 seconds and the heating history was described as Fig. 3. Initially, the temperature kept at 180 ℃ for 100 seconds long, then, raised to the highest temperature 260 ℃at 205 seconds, went to room temperature after 240 seconds. In order to simulate the practical molding equipment during process, the heat is provided from the heating stage at the bottom and each die is handled by the vacuum force, consequently, the heat source was transferred from the bottom surface of copper substrate to whole in the boundary condition setting. In addition, we also performed two type of boundary condition for displacement constrains at the bottom surface of copper substrate, one is fixed end another is sliding end as the schematic pictures in the Fig. 4 (a) and (b), respectively. All the models are symmetric with center line; hence, only half model needs to be calculated but a symmetric boundary should be added in the right-hand side of the model in the Fig. 4
Fig. 1. FEA models of flip chip bond and die attach were illustrated as (a, b) and (c, d), respectively. Each type has two kinds of molding processes, one is the molding epoxy covered onto the silicon substrate as (b, d), another is the molding epoxy has a gap with MEMS chip as (a, c).
Fig. 2. The dimensions of FEA models for flip chip bond and die attach were illustrated as (a) and (b), respectively.
Table I. The coefficients of materials for simulation
Fig. 3. The heating history for epoxy molding process
Fig. 4. The schematic pictures for two boundary conditions at the bottom surface of copper substrate (a) Boundary
condition type 1 is fixed end; and (b) Boundary condition type 2 is sliding end.
Results and Discussion
Diaphragm usually plays the most significant role for sensing and actuating in the MEMS device, thus, the induced stress within membrane area during molding process is the key index for choosing the packaging method. The history of thermal stress in the center of membrane area for flip chip bond and die attach with different molding method and boundary conditions were plotted as Fig. 5 (a) and (b), respectively. And, the maximum of membrane stress for each condition was also listed in the Table 2. According to the results, if the cases with molding epoxy coved onto the silicon substrate had larger induced stress for either flip chip bond or die attach, which means Type II > Type I. The molding epoxy whether covered onto a part of MEMS chip has significant influence on induced stress especially for the die attach cases. Because the difference of CTE between silicon (2.6 ppm/℃) and molding epoxy (35 ppm/℃) is large, if the epoxy covered onto the MEMS chip the mismatch on thermal expansion during increasing the temperature could generate stresses at the interface between two materials shown in the Fig. 6 and further affect the weakest structure in the membrane area. For the die attach case, the membrane structure far from the displacement constrain at the bottom of copper substrate, therefore, the effect of molding epoxy,? Type II > Type I, was more significant compared to the flip chip bond.? Furthermore, the membrane stresses in the cases with fixed-end boundary were larger than the cases with sliding-end boundary, that is BC1 > BC2. This is due to the constraint of fixed-end boundary is stricter than sliding-end boundary; hence, the internal stress is larger for the fixed-end boundary. For the case of die attach with molding epoxy coved onto MEMS chip, the maximum membrane stress was over 2.5 GPa, which might not agree with practical phenomenon. Thus, we suggest the sliding-end boundary condition is more proper for dealing the problem of MEMS chip fixed on the vacuum stage. From the stress history in the Fig. 5, the largest stress occurred at highest temperature 260 ℃ during 175 ~ 205 seconds. However, there are two peaks occurred both at 42 ℃ as increasing the temperature in the beginning and returning to the room temperature at the end. The result comes from the CTE of adhesive became larger at the glass transition temperature, Tg = 42 ℃, the thermal expansion of adhesive increased instantly at the bottom of MEMS chip, consequently, the stress in the membrane was also reduced due to the upward displacement. In the Fig. 6, the maximum stress occurred at the interface between molding epoxy and copper substrate for flip chip bond the interface between molding epoxy and silicon substrate for die attach. Although both were not happened within membrane but the high internal stress could induce the delamination at the interface.???
Fig. 5. The thermal stresses in membrane during heating history for flip chip bonding and wire bonding are shown in the (a) and (b), respectively. The BC1and BC2 are indicated the fixed-end and sliding boundary on the surface of substrate, respectively
Table I. The coefficients of materials for simulation
Fig. 6. The distribution of thermal stress for (a) flip chip bond and (b) die attach with sliding-end boundary as the temperature
?at 200℃. The maximum stress occurred at the interface between modeling epoxy and copper substrate for flip chip bond,
?but the maximum stress occurred at the interface between modeling epoxy and silicon substrate for die attach.
The mismatch of CTE for the heterostructure during the packaging processing of MEMS device can induce the residual stress within the diaphragm to yield the variation of performance, consequently, the molding material with a lower CTE and elastic modulus can effectively reduce the thermal stress. And, flip chip bond is a more proper way for packing of MEMS device with membrane structure.
This project was founded by Micro System Technology Center at Industrial Technology Research Institute (ITRI) Southern. In addition, we are grateful to the National Center for High-Performance Computing for the computer time and facilities